Tegra: topology: fix MISRA defects for Rule 4.6

This patch uses int32_t to replace ints, to fix Rule 4.6 of the
MISRA standard.

Change-Id: I20ac6185929eced684b43da3ef1f8cd5fbddc83d
Signed-off-by: Anthony Zhou <[email protected]>
Signed-off-by: Varun Wadekar <[email protected]>

diff --git a/plat/nvidia/tegra/common/tegra_topology.c b/plat/nvidia/tegra/common/tegra_topology.c
index c423d8c3ebfd341e97c9f8df4ed87fb343ecc3a8..4f6cf932e6cfad04cb2dbb2c9b5483633240c6f5 100644 (file)
--- a/plat/nvidia/tegra/common/tegra_topology.c
+++ b/plat/nvidia/tegra/common/tegra_topology.c
@@ -18,15 +18,15 @@
  * to convert an MPIDR to a unique linear index. An error code (-1) is returned
  * in case the MPIDR is invalid.
  ******************************************************************************/
-int plat_core_pos_by_mpidr(u_register_t mpidr)
+int32_t plat_core_pos_by_mpidr(u_register_t mpidr)
 {
        u_register_t cluster_id, cpu_id;
-       int result;
+       int32_t result;
 
        cluster_id = (mpidr >> (u_register_t)MPIDR_AFF1_SHIFT) & (u_register_t)MPIDR_AFFLVL_MASK;
        cpu_id = (mpidr >> (u_register_t)MPIDR_AFF0_SHIFT) & (u_register_t)MPIDR_AFFLVL_MASK;
 
-       result = (int)cpu_id + ((int)cluster_id * 4);
+       result = (int32_t)cpu_id + ((int32_t)cluster_id * 4);
 
        if (cluster_id >= (u_register_t)PLATFORM_CLUSTER_COUNT) {
                result = PSCI_E_NOT_PRESENT;